EP2A40F672I-9 vs EP2A40F672C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F672I-9 sa pamamagitan ng Intel at EP2A40F672C8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F672I-9 | EP2A40F672C8 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Device | EP2A40 | — |
| Logic Elements | 38,400 | — |
| System Gates | 1,500,000 | — |
| Maximum Operating Frequency | 366 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15-micron all-layer copper, up to 8 metal layers |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked) | — |
| Temperature na Operasyon | -40 °C to +100 °C (Industrial) | 0 C to 85 C (commercial) |
| Packhaging | 672-pin FC-FBGA (Fine-pitch Ball Grid Array) | — |
| Speed Grade | -9 | — |
| True-LVDS Channels | Yes (dedicated) | — |
| Embedded Memory | Dual-port RAM, single-port RAM, ROM, CAM (via ESBs) | Up to 1.5 Mbits |
| Hot Socketing | Supported | — |
| Configuration Mode | Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG | — |
| Moisture Sensitivity Level | MSL 3 | — |
| Peak Reflow Temperature | 220 °C | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Logic Family | — | CMOS |
| Typical Logic Elements (LEs) | — | 40,000 |
| User I/Os | — | 492 pins |
| Bilang ng Pins | — | 672 |
| Package Type | — | FineLine BGA, 27 x 27 mm, 1.0 mm pitch |
| Propagation Delay (speed grade C8) | — | 1.55 ns |
| Phase-Locked Loops (PLLs) | — | 4 |
| LVDS Signaling Support | — | Up to 1 Gbps |
| Multipliers | — | Embedded multiplier blocks |
| I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |