EP2AGZ300FF35C4N vs EP2AGZ300FF35C3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300FF35C4N sa pamamagitan ng Altera at EP2AGZ300FF35C3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300FF35C4N | EP2AGZ300FF35C3N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Series | Arria II GZ | — |
| Logic Elements | 298,000 | — |
| Logic Array Blocks (LABs) | 11,920 | 11,920 |
| Embedded Memory (bits) | 18,854,912 (~17.9 Mbit) | — |
| User I/O Count | 554 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Process Technology | 40 nm | 40 nm |
| Core Voltage | 0.9 V | 0.9 V |
| Package Type | 1152-BBGA, FCBGA (flip-chip) | — |
| Terminal Form | Ball | — |
| Package Code (JEDEC) | HBGA | — |
| Operating Temperature Grade | Commercial (C4 = 0C to +85C) | Commercial |
| Configuration Memory | SRAM-based (volatile, requires boot device) | — |
| Transceivers | Multi-gigabit transceivers integrated | Up to 16 channels |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | — |
| PLLs | [DATA_NEEDED: PLL count] | 8 |
| Tindminan RoHS | Compliant (per Besenchips / DigiKey listing) | — |
| Lead-Free Status | Lead free (per Besenchips listing) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Maximum Operating Frequency | 500 MHz | — |
| Family | — | Arria II GZ |
| Logic Elements (LE) | — | 298,000 |
| Embedded Memory (Bits) | — | 18,854,912 |
| User I/Os | — | 554 |
| Maximum User I/O Pins (Package) | — | 1,152 |
| 18x18 Multipliers | — | 554 |
| Max Transceiver Data Rate | — | 6.375 Gbps |
| Packhaging | — | 1152-ball FCBGA (FF35) |