EP2AGZ300FF35C4N vs EP2AGZ300FF35C3N 比較
詳細並排比較 EP2AGZ300FF35C4N 由 Altera 與 EP2AGZ300FF35C3N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2AGZ300FF35C4N | EP2AGZ300FF35C3N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Series | Arria II GZ | — |
| Logic Elements | 298,000 | — |
| Logic Array Blocks (LABs) | 11,920 | 11,920 |
| Embedded Memory (bits) | 18,854,912 (~17.9 Mbit) | — |
| User I/O Count | 554 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Process Technology | 40 nm | 40 nm |
| Core Voltage | 0.9 V | 0.9 V |
| Package Type | 1152-BBGA, FCBGA (flip-chip) | — |
| Terminal Form | Ball | — |
| Package Code (JEDEC) | HBGA | — |
| Operating Temperature Grade | Commercial (C4 = 0C to +85C) | Commercial |
| Configuration Memory | SRAM-based (volatile, requires boot device) | — |
| Transceivers | Multi-gigabit transceivers integrated | Up to 16 channels |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | — |
| PLLs | [DATA_NEEDED: PLL count] | 8 |
| RoHS 狀態 | Compliant (per Besenchips / DigiKey listing) | — |
| Lead-Free Status | Lead free (per Besenchips listing) | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Maximum Operating Frequency | 500 MHz | — |
| Family | — | Arria II GZ |
| Logic Elements (LE) | — | 298,000 |
| Embedded Memory (Bits) | — | 18,854,912 |
| User I/Os | — | 554 |
| Maximum User I/O Pins (Package) | — | 1,152 |
| 18x18 Multipliers | — | 554 |
| Max Transceiver Data Rate | — | 6.375 Gbps |
| 封裝 | — | 1152-ball FCBGA (FF35) |