EP2S130F1508C5RB vs EP2S130F1508C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S130F1508C5RB sa pamamagitan ng Intel at EP2S130F1508C4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S130F1508C5RB | EP2S130F1508C4N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Family | Stratix II | — |
| Logic Elements | 132,600 | — |
| Logic Array Blocks (LABs) | 6,727 | 6,627 |
| User I/Os | 1,126 | — |
| Embedded Memory | 6,747 Kbits (TriMatrix: MRAM/M4K/M512) | — |
| Embedded 18x18 Multipliers | 252 (504 9x9 equivalent) | — |
| Packhaging | 1508-ball FBGA (F1508), 40x40 mm, 1.5 mm pitch | 1,508-ball FBGA |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V (typical) | — |
| Speed Grade | 5 (C5, commercial) | C4 (commercial) |
| Temperature na Operasyon | 0C to +85C (commercial, junction) | 0C to +85C (commercial) |
| Uri ng Pagpapasok | Surface Mount (FBGA) | Surface Mount |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Tindminan RoHS | Compliant | Compliant (N suffix) |
| Lead-Free | Yes | — |
| Lifecycle | Not Recommended for New Designs (NRND) | — |
| Series | — | Stratix II |
| User I/O Pins | — | 1,126 |
| Package Code | — | BGA |
| Package Shape | — | SQUARE |
| Number of Terminals | — | 1,508 |
| Form of Terminal | — | BALL |
| Configuration | — | SRAM, field-programmable |
| Logic Architecture | — | Adaptive Logic Module (ALM) |
| Lead Free | — | Yes |