EP2S60F672C3 vs EP2S60F672C5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F672C3 sa pamamagitan ng Altera at EP2S60F672C5 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S60F672C3 | EP2S60F672C5 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Stratix II | Stratix II |
| Logic Elements | 60,440 | 60,440 |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Total RAM Bits | 2,544,192 | 2,544,192 bits |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | 12 (dedicated 18 × 18 multipliers) |
| User I/Os | 492 | — |
| PLLs | 4 | — |
| Global Clocks | [DATA_NEEDED: global clock count] | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Speed Grade | C3 | — |
| Packhaging | 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch | 672-ball FC-FBGA (35 × 35 mm, 1 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Modes | PS, PPS, PPA, FPP, JTAG | — |
| Temperature na Operasyon | 0C to +85C (commercial) | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-RoHS (legacy product, pre-RoHS production runs) |
| Device Family | — | Stratix II FPGA |
| Configurable Logic Blocks (CLBs) | — | 24,176 |
| Maximum User I/Os | — | 492 |
| Operating Frequency | — | Up to 609.76 MHz |
| Operating Temperature Grade | — | Commercial (C5 suffix) |
| Hanay ng Temperature na Operasyon | — | 0°C to +85°C |
| Number of PLLs | — | 4 |
| I/O Standards | — | LVDS, LVTTL, SSTL, HSTL, PCI-X |
| Configuration Scheme | — | Fast Passive Parallel, JTAG, Active Serial |