EP2S60F672C3N vs EP2S60F67214N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F672C3N sa pamamagitan ng Intel at EP2S60F67214N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S60F672C3N | EP2S60F67214N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Stratix II | Stratix II |
| Logic Elements (LE) | 60,440 | — |
| Logic Array Blocks (LABs) | 3,022 | — |
| Adaptive Logic Modules (ALMs) | 24,176 | — |
| Total Embedded Memory | 2,544,192 bits (2.5 Mbits) | — |
| User I/O Pins | 492 | — |
| User I/O Banks | 8 | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.2 V | — |
| I/O Supply Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| Pre-Driver Supply (VCCPD) | 3.3 V | — |
| Maximum Internal Clock Frequency | 816.99 MHz | — |
| PLLs | 4 | — |
| Global Clock Networks | 16 | — |
| Packhaging | 672-pin FC-FBGA | 672-ball FBGA (FineLine BGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (commercial grade) | -40C to +100C (industrial) |
| Speed Grade | C3 (slower speed grade) | I4 (industrial, fast) |
| Tindminan RoHS | unknown | Lead-free / RoHS compliant |
| Lead-Free | unknown | — |
| Logic Elements | — | 60,440 LE |
| Total RAM Bits | — | 2,544,192 bit (2.5 Mbit) |
| DSP Blocks | — | 12 |
| Phase-Locked Loops (PLLs) | — | 4 |
| Core Voltage | — | 1.2 V (typical) |
| I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count for FBGA-672] |
| Configuration | — | SRAM-based, configured via bitstream |
| Level ng MSL | — | 3 (168 hours floor life) |