EP2S60F672C3N vs EP2S60F67214N 比較
詳細並排比較 EP2S60F672C3N 由 Intel 與 EP2S60F67214N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2S60F672C3N | EP2S60F67214N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | Stratix II | Stratix II |
| Logic Elements (LE) | 60,440 | — |
| Logic Array Blocks (LABs) | 3,022 | — |
| Adaptive Logic Modules (ALMs) | 24,176 | — |
| Total Embedded Memory | 2,544,192 bits (2.5 Mbits) | — |
| User I/O Pins | 492 | — |
| User I/O Banks | 8 | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.2 V | — |
| I/O Supply Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| Pre-Driver Supply (VCCPD) | 3.3 V | — |
| Maximum Internal Clock Frequency | 816.99 MHz | — |
| PLLs | 4 | — |
| Global Clock Networks | 16 | — |
| 封裝 | 672-pin FC-FBGA | 672-ball FBGA (FineLine BGA) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0C to +85C (commercial grade) | -40C to +100C (industrial) |
| Speed Grade | C3 (slower speed grade) | I4 (industrial, fast) |
| RoHS 狀態 | unknown | Lead-free / RoHS compliant |
| Lead-Free | unknown | — |
| Logic Elements | — | 60,440 LE |
| Total RAM Bits | — | 2,544,192 bit (2.5 Mbit) |
| DSP Blocks | — | 12 |
| Phase-Locked Loops (PLLs) | — | 4 |
| Core Voltage | — | 1.2 V (typical) |
| I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count for FBGA-672] |
| Configuration | — | SRAM-based, configured via bitstream |
| MSL 等級 | — | 3 (168 hours floor life) |