EP2SGX130GF40C4NES vs EP2SGX130GF40C3NES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2SGX130GF40C4NES sa pamamagitan ng Intel at EP2SGX130GF40C3NES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2SGX130GF40C4NES - 132K LE Stratix II GX FPGA, 6.375Gbps SERDES, 1508-FBGA | Intel
EP2SGX130GF40C4NES ⚠ Huling PagbiliAltera
EP2SGX130GF40C3NES - Stratix II GX FPGA, 132K LE, 6.375Gbps | Altera
EP2SGX130GF40C3NES ObsoletePagsanggunian na paghahambing
| Parametro | EP2SGX130GF40C4NES | EP2SGX130GF40C3NES |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 132,540 | 132540 |
| Logic Blocks / ALMs | Approximately 53,000 ALMs | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Maximum Transceiver Data Rate | 6.375 Gbps | 6.375 Gbps |
| Transceiver Channels | Up to 20 (4 to 20, device-dependent) | 4 to 20 (per device family configuration) |
| User I/O Pins | 734 | — |
| Total Package Pins | 1508 (FC-FBGA ball grid) | — |
| Package Code | GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch) | — |
| Speed Grade | C4 (speed grade -4) | — |
| Internal Operating Frequency | Up to 717 MHz | — |
| Embedded Memory | Approximately 4.5 Mbits (TriMatrix) | — |
| PLL Blocks | 8 | — |
| DSP Blocks | Yes (variable, see datasheet) | — |
| Uri ng Pagpapasok | Surface Mount (flip-chip BGA) | Surface Mount |
| Lead-Free / RoHS | Yes (LEAD FREE per datasheet family code) | — |
| Level ng MSL | Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level] | — |
| Temperature na Operasyon | Commercial Extended (per N suffix) | — |
| JEDEC Standard Reference | MS-034AAU-1 | — |
| Logic Array Blocks (LABs) | — | 7047 |
| Maximum Internal Frequency | — | 778.82 MHz |
| Transceiver Feature | — | Embedded SERDES with Clock/Data Recovery (CRU) |
| Uri ng Memory | — | TriMatrix embedded memory (distributed RAM, block RAM, shift register) |
| Packhaging | — | 1508-ball FC-FBGA (40 x 40 mm, 1 mm pitch) |
| Operating Temperature Grade | — | Commercial Extended |
| Terminal Form | — | Ball (BGA) |
| Tindminan RoHS | — | Lead-free compliant (per package code MS-034AAU-1) |
| Series | — | EP2SGX130 |