EP3SE110F780C4 vs EP3SE110F780I4L Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE110F780C4 sa pamamagitan ng Intel at EP3SE110F780I4L sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SE110F780C4 | EP3SE110F780I4L |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | Stratix III E | Stratix III E |
| Logic Elements | 107,500 | 107,500 |
| Logic Array Blocks (LABs) | 4,300 | — |
| Embedded Memory | 8,936,448 bits (8.9 Mbit) | 8,936,448 bits (8.9 Mbit) |
| DSP Blocks (18x18 Multipliers) | 896 | — |
| Maximum User I/O | 488 | — |
| Packhaging | 780-ball FCBGA (FineLine BGA) | 780-pin FC-FBGA (Flip-Chip BGA) |
| Speed Grade | C4 | — |
| Process Node | 40 nm | — |
| Transceiver Data Rate | Up to 1.6 Gbps | — |
| Memory Interface Support | DDR3 up to 800 MHz | — |
| Temperature na Operasyon | Commercial (0C to +85C) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (FC-FBGA) |
| Tindminan RoHS | Compliant | Compliant (per legacy Altera data) |
| Configuration | Partial Reconfiguration support | — |
| LABs (Logic Array Blocks) | — | 4,300 |
| User I/Os | — | 488 |
| Maximum Operating Frequency | — | 375 MHz |
| Process Technology | — | 65 nm CMOS |
| Core Voltage | — | 0.9 V |
| Package Body Size | — | 29 mm × 29 mm |
| Ball Pitch | — | 1.0 mm |
| Operating Temperature (Industrial) | — | -40 °C to +100 °C |
| Product Status | — | Not Recommended for New Designs (NRND) |