EP3SE260F1517C4L vs EP3SE260H780C4LG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE260F1517C4L sa pamamagitan ng Altera at EP3SE260H780C4LG sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP3SE260H780C4LG - Stratix III E FPGA, 488 I/O, 780-HBGA | Altera
EP3SE260H780C4LG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EP3SE260F1517C4L | EP3SE260H780C4LG |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | Stratix III E | Stratix III Enhanced (EP3SE) |
| Logic Elements | 255,000 | 254,400 |
| Embedded Memory Bits | 16,672,768 | — |
| Number of User I/O | 976 | — |
| Packhaging | 1517-BBGA, FCBGA (FineLine BGA) | 780-ball FineLine BGA (HBGA, 29 mm x 29 mm, 1.0 mm pitch) |
| Process Technology | 65 nm | 65 nm TSMC low-power CMOS |
| Core Voltage | 1.1 V | — |
| Maximum Operating Frequency | 450 MHz | — |
| Number of Transceivers | 16 | — |
| Transceiver Data Rate (Max) | 1.25 Gbps | — |
| Multiplier Blocks (18x18) | 384 | — |
| Total TriMatrix Memory | 15.04 Mbits (MLAB + M9K + M144K) | — |
| PLLs | 4 per quadrant + 8 fractional PLLs | — |
| Temperature na Operasyon | 0C to +85C (commercial) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (Pb-free HBGA) |
| Adaptive Logic Modules (ALMs) | — | 101,760 |
| Embedded Memory (M9K + M144K) | — | 18.36 Mbits |
| DSP Blocks (18-bit x 18-bit) | — | 768 |
| 18-bit x 18-bit Multipliers | — | 1,536 |
| Transceivers (full-duplex) | — | 8 (up to 6.375 Gbps) |
| Maximum User I/O Pins | — | 488 |
| Speed Grade | — | C4 (commercial, mid-speed tier) |
| Temperature Grade | — | Commercial (0C to +85C junction) |
| Operating Voltage (Core) | — | 0.9 V / 1.0 V / 1.1 V (programmable) |
| External Memory Interface | — | Up to 800 Mbps DDR3, QDR II+, RLDRAM II |
| Hard IP Blocks | — | PCIe Gen2, 10GbE MAC, memory controllers |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |