EP3SE260H780C4LN vs EP3SE260H780I4L Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE260H780C4LN sa pamamagitan ng Intel at EP3SE260H780I4L sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SE260H780C4LN - Stratix III E FPGA 255K LE 780-FCBGA | Intel
EP3SE260H780C4LN ⚠ Huling PagbiliIntel
EP3SE260H780I4L - Stratix III E FPGA, 255K Logic Elements | Intel
EP3SE260H780I4L ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SE260H780C4LN | EP3SE260H780I4L |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Family | Stratix III E | Stratix III E (Enhanced) |
| Logic Elements | 255,000 | 255,000 |
| Embedded Memory | 16,672,768 bits (16.67 Mbit) | — |
| Logic Array Blocks (LABs) | 10,200 | — |
| Embedded Multipliers (18x18) | 384 | — |
| User I/O Count | 488 | 488 |
| Packhaging | 780-ball FCBGA (FineLine BGA) | — |
| Speed Grade | C4 (commercial, moderate speed) | — |
| Temperature na Operasyon | 0C to +85C (commercial) | Industrial, -40C to +85C |
| Core Voltage (VCC) | 1.0 V | — |
| I/O Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| Auxiliary Voltage (VCCPD/VCCPT) | 2.5 V / 3.0 V | — |
| PLLs | 8 | — |
| Global Clock Networks | 16 | — |
| Process Node | 40 nm TSMC | — |
| Configuration Modes | FPP, AS, PS, JTAG | — |
| Tindminan RoHS | Compliant | Compliant (lead-free) |
| Level ng MSL | 3 (168 hours) | — |
| Total Memory Bits | — | 16,672,640 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Core Voltage | — | 0.9 V |
| Process Technology | — | 65 nm |
| Package Type | — | 780-pin FC-HFBGA (flip-chip BGA) |
| Uri ng Pagpapasok | — | Surface Mount (flip-chip) |
| Number of Transceivers | — | 24 (family-level maximum, per-pin count depends on variant) |
| Max Transceiver Data Rate | — | 6.375 Gbps (Stratix III E family spec) |
| Number of 18x18 Multipliers | — | [DATA_NEEDED: per-package multiplier count] |
| Configuration Mode | — | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel |
| Pin/Package | — | 780-BBGA, FCBGA (flip-chip) |