EP3SL200H780C4LN vs EP3SL200H780C3N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL200H780C4LN sa pamamagitan ng Altera at EP3SL200H780C3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EP3SL200H780C4LN EP3SL200H780C4LN - Stratix III L 200K Logic Element FPGA | Intel

EP3SL200H780C4LN - Stratix III L 200K Logic Element FPGA | Intel

EP3SL200H780C4LN ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EP3SL200H780C4LN EP3SL200H780C3N
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili NRND
Series Stratix III L —
Logic Elements 200,000 200,000
Logic Array Blocks (LABs) 8,000 8,000
User I/Os 488 488
Total Memory Bits 10,901,504 —
Bilang ng Pins 780 —
Packhaging 780-BBGA / HBGA / FCBGA 780-Ball FCBGA (HBGA), 29 x 29 mm
Uri ng Pagpapasok Surface Mount Surface Mount
Core Supply Voltage 0.86 V to 1.15 V —
Temperature na Operasyon 0 C to +70 C (commercial, 'C' grade) 0C to +85C (commercial)
Speed Grade 4 (commercial, slowest of grade 4) C3 (commercial, -3 speed)
Transceivers Multi-quad, up to 6.375 Gbps 24 channels, up to 3.75 Gbps
DSP Blocks (18x18 multipliers) [DATA_NEEDED: exact multiplier count] —
PLLs 8 12 (Stratix III PLL array)
Configuration JTAG / Passive Serial / Fast Passive Parallel JTAG IEEE Std 1149.1, passive/active serial
Tindminan RoHS Compliant —
Lead-Free Yes —
Family — Stratix III L (low-power)
Process Node — 40 nm
Embedded Memory Bits — 10,901,504 bits
Maximum Internal Clock Frequency — 800 MHz
DSP Blocks — 384
Voltage - Core — 0.9 V / 1.0 V (core, VCC)
Voltage - I/O — 1.2 V to 3.3 V (VCCIO banks)
Level ng MSL — 3
Lead-Free / RoHS — Yes
Mounting Pitch — 1.0 mm ball pitch

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