EP3SL50F484I4LN vs EP3SL50F484I4LG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F484I4LN sa pamamagitan ng Altera at EP3SL50F484I4LG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SL50F484I4LG - Stratix III L FPGA, 47.5K LE, 484-FCBGA | Altera (Intel)
EP3SL50F484I4LG NrndPagsanggunian na paghahambing
| Parametro | EP3SL50F484I4LN | EP3SL50F484I4LG |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Device Family | Stratix III L | — |
| Logic Cells | 47,500 | — |
| Embedded Memory | 2,184,192 bits | 2,184,192 bits (273 KB) |
| User I/O | 296 | — |
| Logic Array Blocks | 1,900 LABs | — |
| Listed Frequency | 717 MHz | — |
| Process Technology | CMOS | — |
| Packhaging | 484-BBGA, FCBGA | 484-Ball FCBGA (FBGA) |
| Package Description | FBGA-484 | — |
| Terminal Count | 484 | — |
| Terminal Form | Ball | — |
| Package Body Material | Plastic/Epoxy | — |
| Lead-Free Status | Lead free | — |
| Operating Temperature Grade | Industrial | — |
| I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| I/O Voltage | [DATA_NEEDED: I/O voltage] | — |
| Junction Temperature | [DATA_NEEDED: junction temperature] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Family | — | Stratix III L |
| Series | — | EP3SL50 |
| Logic Elements | — | 47,500 |
| User I/Os | — | 296 |
| Uri ng Pagpapasok | — | Surface Mount |
| Temperature na Operasyon | — | -40C to +100C (Industrial) |
| Speed Grade | — | I4 (fast) |
| Volte ng Pagbibigay | — | 0.85 V / 1.1 V / 1.2 V / 2.5 V / 3.3 V (multi-rail) |
| Process Node | — | 40 nm |
| Lead-Free | — | Yes |
| Total I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceivers | — | [DATA_NEEDED: transceiver channel count] |
| Configuration Memory | — | SRAM-based |
| Configuration Interface | — | JTAG / Passive Serial / Fast Passive Parallel |