EP3SL50F780C3 vs EP3SL50F780C2G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F780C3 sa pamamagitan ng Intel at EP3SL50F780C2G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SL50F780C3 - Stratix III L FPGA, 47.5K LE, 780-FBGA | Intel / Altera
EP3SL50F780C3 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SL50F780C3 | EP3SL50F780C2G |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | Stratix III L (low-power) | — |
| Series | Stratix III | Stratix III L |
| Logic Elements | 47,500 | 47,500 LE |
| Logic Array Blocks (LABs) | 1,900 | — |
| Embedded Memory Bits | 2,184,192 | — |
| User I/Os | 488 | 488 |
| Package Type | 780-BBGA, FCBGA (FineLine) | — |
| Device Pin Count | 780 | — |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0 °C to +85 °C (Commercial) |
| Speed Grade | 3 | -2 (C2) |
| Supply Voltage (Core) | [DATA_NEEDED: VCCINT nominal value] | — |
| PLLs | 12 | — |
| Global Clock Networks | 24 | — |
| Process Node | 65 nm TSMC | — |
| Configuration Method | SRAM-based, supports Partial Reconfiguration | — |
| Tindminan RoHS | Compliant | Pb-Free / RoHS Compliant (-G suffix) |
| Lead-Free / Halogen-Free | Lead-Free (per package marking); Halogen-Free status unknown | — |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | MSL3 (per JEDEC J-STD-020, typical for large FBGA) | — |
| Adaptive Logic Modules (ALMs) | — | 19,000 ALM |
| Embedded Memory | — | 2.08 Mbit |
| Total Memory Bits | — | 2,184,192 bit |
| Operating Supply Voltage (Core) | — | 1.1 V |
| Packhaging | — | 780-ball FCBGA |
| Uri ng Pagpapasok | — | Surface Mount |
| Transceivers | — | Reduced / Not Featured (L-tier) |
| DSP Blocks | — | 18×18 multipliers (per family datasheet) |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel |