EP3SL50F780C3G vs EP3SL50F780C2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F780C3G sa pamamagitan ng Intel at EP3SL50F780C2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SL50F780C3G - Stratix III L FPGA, 47.5K LE, 488 I/O, 780-FBGA | Altera / Intel
EP3SL50F780C3G ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EP3SL50F780C3G | EP3SL50F780C2 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Stratix III L | Stratix III L |
| Logic Elements (LE) | 47,500 | 47,500 |
| Adaptive Logic Modules (ALM) | 19,000 | — |
| Embedded Memory (bits) | 2,184,192 | 2,184,192 |
| Distributed RAM | 2.08 Mbit | — |
| User I/O Count | 488 | — |
| Core Voltage | 1.1 V | 1.1 V |
| Temperature na Operasyon | 0C to +85C (commercial) | 0°C to +85°C (commercial) |
| Temperature Grade Suffix | C (commercial, "3" speed grade) | — |
| Packhaging | 780-ball FBGA | 780-ball FCBGA (Flip-Chip BGA) |
| Uri ng Pagpapasok | SMD/SMT | Surface Mount (BGA) |
| Packaging | Tray | — |
| Process Technology | TSMC 40 nm low-power | 65 nm |
| Configuration Method | SRAM-based, JTAG/AS configuration | — |
| Design Software | Intel Quartus II (v9.0+) | — |
| Tindminan RoHS | Compliant (per DigiKey listing) | Compliant |
| Logic Array Blocks (LABs) | — | 1,900 |
| Maximum User I/Os | — | 488 |
| Maximum Core Frequency | — | 600 MHz |
| Configuration Interface | — | JTAG / passive serial / fast passive parallel |
| I/O Standards | — | LVDS, LVCMOS, SSTL, HSTL, DDR2/DDR3 memory interfaces |
| Embedded Memory Type | — | TriMatrix (MLAB, M9K, M144K blocks) |