EP4CE55F29C8L vs EP4CE115F29C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP4CE55F29C8L sa pamamagitan ng Intel at EP4CE115F29C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP4CE55F29C8L | EP4CE115F29C8N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone IV E | Cyclone IV E |
| Logic Elements | 55,856 | 114,480 |
| Embedded Memory Bits | 2,396,160 bits | — |
| Embedded Memory (M9K Blocks) | 260 blocks | — |
| Embedded 18x18 Multipliers | 156 | 66 |
| Maximum User I/O Pins | 374 | — |
| PLLs | 4 | — |
| Global Clock Networks | 20 | — |
| Core Voltage | 1.2 V | — |
| Process Technology | 60 nm (low-power) | — |
| Packhaging | 780-ball FBGA (F29), 29x29 mm, 1.0 mm pitch | 780-ball FBGA (FineLine BGA) |
| Speed Grade | C8 (commercial, 8 speed bin) | C8 |
| Temperature na Operasyon | 0C to +85C (commercial, 'L' suffix) | 0 °C to 85 °C (Commercial) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | Compliant | Compliant |
| Configuration Schemes | AS, PS, JTAG, FPP | — |
| JTAG (IEEE 1149.1) | Supported | — |
| Configuration Memory | SRAM-based (external flash required) | — |
| Total Memory Bits | — | 3,981,312 (3888 Kb) |
| General-Purpose PLLs | — | 4 |
| User I/O Pins | — | 528 |
| I/O Banks | — | 8 |
| Process Node | — | 60 nm |
| Core Voltage (VCCINT) | — | 1.15 V to 1.25 V |
| Configuration Method | — | JTAG, Passive/Active Serial, Fast Passive/Active Parallel |
| Radiation Hardened | — | No |
| Tray Quantity | — | 36 units |