EP4CE6E22C7 vs EP4CE6E22C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP4CE6E22C7 sa pamamagitan ng Intel at EP4CE6E22C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP4CE6E22C7 | EP4CE6E22C6 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Cyclone IV E | — |
| Family | Cyclone IV | Cyclone IV E |
| Core Architecture | Logic Elements (LE) | — |
| Number of Logic Elements (LEs) | 6,272 | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Number of Configurable Logic Blocks (CLBs) | 392 | — |
| Total Embedded Memory Bits | 276,480 | — |
| Total RAM (Kbits) | 270 | — |
| Number of Embedded 18x18 Multipliers | 15 | — |
| Number of PLLs | 4 | — |
| User I/O Count | 91 | — |
| I/O Standards Supported | LVDS, LVCMOS, LVTTL, SSTL, HSTL, PCI | — |
| Operating Supply Voltage (Core) | 1.0 V to 1.2 V (typ. 1.2 V) | — |
| Operating Supply Voltage (I/O) | 1.2 V to 3.3 V | — |
| Logic Speed Grade | C7 | — |
| Operating Temperature Range (Commercial) | 0°C to +85°C (junction) | — |
| Packhaging | 144-LQFP Exposed Pad (EQFP-144), 22 x 22 mm, 0.5 mm pitch | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Modes | JTAG, Active Serial (AS), Passive Serial (PS) | — |
| Process Technology | 60 nm low-power CMOS | TSMC 60 nm low-k |
| Tindminan RoHS | Compliant | Compliant |
| Device Logic Elements | — | 6,272 LE |
| Logic Array Blocks (LABs) | — | 392 LABs |
| Total RAM Bits | — | 270 Kbit |
| Embedded 18x18 Multipliers | — | 15 |
| PLLs | — | 2 |
| Maximum User I/Os | — | 91 |
| Core Voltage | — | 1.2 V |
| Speed Grade | — | C6 |
| Temperature na Operasyon | — | 0 °C to +85 °C (Commercial) |
| Package Type | — | 144-pin EQFP (Enhanced QFP, exposed pad) |
| Package Dimensions | — | 22 mm × 22 mm |
| Lead Pitch | — | 0.5 mm |
| Configuration Method | — | SRAM-based (volatile); JTAG, Active Serial, Passive Serial |