EP610IDC-15 vs EP610ILI-12 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP610IDC-15 sa pamamagitan ng Intel at EP610ILI-12 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP610IDC-15 EP610ILI-12
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili NRND
Device Family Altera Classic EPLD —
Macrocells 16 —
Usable Gates 300 300
Propagation Delay (tPD) 15 ns —
Maximum Frequency 66 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) —
Temperature na Operasyon 0C to +70C (commercial) -40C to +85C (industrial grade)
Process Technology CMOS, UV-erasable / OTP —
Packhaging 24-pin CerDIP (ceramic DIP) 28-pin PLCC (J-Lead)
Uri ng Pagpapasok Through-hole Surface Mount
I/O Pins 24 (per package; macrocell-programmable) —
Logic-Block Architecture AND/OR macrocell array with programmable flip-flops —
Program/Erase UV-erasable, OTP-compatible —
Development Tool MAX+PLUS II —
Tindminan RoHS [DATA_NEEDED: RoHS status of CerDIP variant] [DATA_NEEDED: RoHS status]
Programming Current 11.0 mA typical (per Classic family datasheet) —
Family — Classic EPLD (EP610)
Macro Cells — 16
Speed Grade (tpd) — 12 ns
Supply Voltage (Vcc) — 5 V (4.75 V to 5.25 V)
Supply Voltage (Vpp) — [DATA_NEEDED: Vpp programming voltage]
Operating Frequency (max) — 83.3 MHz
Logic Elements — [DATA_NEEDED: exact LE count]
User I/O Pins — [DATA_NEEDED: I/O pin count]
Dedicated Inputs — 4
Technology — CMOS EPROM
Programmable Security Bit — Yes
TTL Compatibility — 100 TTL emulation
Level ng MSL — [DATA_NEEDED: MSL rating]

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