EP610ILC10 vs EP610ILC-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610ILC10 sa pamamagitan ng Intel at EP610ILC-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP610ILC10 | EP610ILC-10 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Classic EPLD (EP610) | — |
| Logic Elements | 16 macrocells | — |
| Gates | 300 gates equivalent | — |
| Product Terms | 160 | 160 |
| I/O Lines | 16 | — |
| Dedicated Inputs | 4 | 4 |
| Propagation Delay (tPD) | 15 ns (10 ns speed grade) | — |
| Maximum Internal Frequency | 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Temperature na Operasyon | -40 C to +85 C (Industrial) | [DATA_NEEDED: operating temperature range] |
| Technology | CMOS, UV-erasable / OTP | — |
| Architecture | PAL-type AND-OR-NOT | PAL-type with macrocells |
| Packhaging | 28-pin PLCC (J-Lead) | PLCC-28 (plastic J-lead chip carrier) |
| Uri ng Pagpapasok | Surface Mount / Socket | Surface Mount (PLCC socket or solder) |
| Tindminan RoHS | Unknown - verify with manufacturer | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | Classic EPLD |
| Product Type | — | UV-Erasable / OTP PLD |
| Macrocells | — | 16 |
| Usable Gates | — | 300 |
| I/O Pins | — | 16 |
| Volte ng Pagbibigay | — | 5 V (single supply) |
| Pin-to-Pin Delay (tPD) | — | 10 ns (grade -10) |
| Counter Frequency (fCNT) | — | 100 MHz |
| Logic Family Compatibility | — | TTL (5 V CMOS/TTL-compatible I/O) |