EP610IPC-25 vs EP610LC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610IPC-25 sa pamamagitan ng Intel at EP610LC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP610IPC-25 | EP610LC-15 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Classic EPLD (EP610) | Altera Classic EPLD (EP610) |
| Architecture | PAL-type, CMOS, Erasable | — |
| Propagation Delay (tpd) | 25 ns (max) | 15 ns |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Maximum Inputs | 20 | — |
| Maximum I/O Pins | 16 | — |
| Dedicated Outputs | 16 | — |
| Product Terms | 160 | — |
| Temperature na Operasyon | 0 °C to +70 °C (Commercial) | 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] |
| Packhaging | 24-pin PDIP (Plastic DIP) | 28-pin PLCC (J-lead, plastic OTP) |
| Technology | CMOS, UV-erasable (windowless in IPC pkg) | — |
| TTL Compatibility | 100% TTL emulation | — |
| Uri ng Pagpapasok | Through-Hole | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Tindminan RoHS | Non-compliant (contains Pb, PDIP package) | unknown |
| Logic Capacity | Equivalent to ~24 standard 24-pin PALs | — |
| Product Type | — | Classic EPLD (Erasable Programmable Logic Device) |
| Logic Elements / Macrocells | — | 16 macrocells |
| Equivalent Gates | — | 300 gates |
| Counter Frequency (fmax) | — | 83.3 MHz |
| Pipelined Data Rate | — | up to 100 MHz |
| Supply Voltage (Vcc) | — | 5 V (single supply) |
| Process Technology | — | CMOS |
| Bilang ng Pins | — | 28 |
| Programming | — | OTP (one-time programmable) |