EP610LC15 vs EP610IPC-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610LC15 sa pamamagitan ng Rochester Electronics at EP610IPC-25 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP610LC15 - 16-Macrocell Classic EPLD, 15ns, 5V, PLCC-28 | Rochester
EP610LC15 Obsolete
Pagsanggunian na paghahambing
| Parametro | EP610LC15 | EP610IPC-25 |
|---|---|---|
| Brand | Rochester Electronics | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Device Family | Classic EPLD (EP610) | — |
| Number of Macrocells | 16 | — |
| Number of Usable Gates | [DATA_NEEDED: usable gate count] | — |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Toggle Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (±10%) | 4.75 V to 5.25 V |
| Dedicated Inputs | 10 | — |
| I/O Pins | 16 | — |
| Total Logic Pins | 24 | — |
| Technology | UV-erasable EPROM, CMOS | CMOS, UV-erasable (windowless in IPC pkg) |
| Packhaging | PLCC-28 (J-Lead) | 24-pin PDIP (Plastic DIP) |
| Temperature na Operasyon | 0 °C to +70 °C (LC suffix = commercial) | 0 °C to +70 °C (Commercial) |
| Programming Interface | Altera 4-pin serial (Classic algorithm) | — |
| Security Bit | Yes (programmable) | — |
| Tindminan RoHS | Compliant (Rochester re-creation) | Non-compliant (contains Pb, PDIP package) |
| Family | — | Classic EPLD (EP610) |
| Architecture | — | PAL-type, CMOS, Erasable |
| Propagation Delay (tpd) | — | 25 ns (max) |
| Maximum Inputs | — | 20 |
| Maximum I/O Pins | — | 16 |
| Dedicated Outputs | — | 16 |
| Product Terms | — | 160 |
| TTL Compatibility | — | 100% TTL emulation |
| Uri ng Pagpapasok | — | Through-Hole |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Logic Capacity | — | Equivalent to ~24 standard 24-pin PALs |