EP610LC15 vs EP610IPC-25 比較
詳細並排比較 EP610LC15 由 Rochester Electronics 與 EP610IPC-25 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP610LC15 - 16-Macrocell Classic EPLD, 15ns, 5V, PLCC-28 | Rochester
EP610LC15 Obsolete
規格比較
| 參數 | EP610LC15 | EP610IPC-25 |
|---|---|---|
| 品牌 | Rochester Electronics | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Device Family | Classic EPLD (EP610) | — |
| Number of Macrocells | 16 | — |
| Number of Usable Gates | [DATA_NEEDED: usable gate count] | — |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Toggle Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (±10%) | 4.75 V to 5.25 V |
| Dedicated Inputs | 10 | — |
| I/O Pins | 16 | — |
| Total Logic Pins | 24 | — |
| Technology | UV-erasable EPROM, CMOS | CMOS, UV-erasable (windowless in IPC pkg) |
| 封裝 | PLCC-28 (J-Lead) | 24-pin PDIP (Plastic DIP) |
| 工作溫度 | 0 °C to +70 °C (LC suffix = commercial) | 0 °C to +70 °C (Commercial) |
| Programming Interface | Altera 4-pin serial (Classic algorithm) | — |
| Security Bit | Yes (programmable) | — |
| RoHS 狀態 | Compliant (Rochester re-creation) | Non-compliant (contains Pb, PDIP package) |
| Family | — | Classic EPLD (EP610) |
| Architecture | — | PAL-type, CMOS, Erasable |
| Propagation Delay (tpd) | — | 25 ns (max) |
| Maximum Inputs | — | 20 |
| Maximum I/O Pins | — | 16 |
| Dedicated Outputs | — | 16 |
| Product Terms | — | 160 |
| TTL Compatibility | — | 100% TTL emulation |
| 安裝類型 | — | Through-Hole |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Logic Capacity | — | Equivalent to ~24 standard 24-pin PALs |