EP610LI-30 vs EP610DC-30 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610LI-30 sa pamamagitan ng Rochester Electronics at EP610DC-30 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester
EP610LI-30 ✓ Nakahanda
Pagsanggunian na paghahambing
| Parametro | EP610LI-30 | EP610DC-30 |
|---|---|---|
| Brand | Rochester Electronics | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Product Type | EPLD (Erasable Programmable Logic Device) | Classic EPLD (Erasable Programmable Logic Device) |
| Family | Classic EPLD (MAX architecture) | EP610 (Classic Device Family) |
| Macrocells | 16 | 16 |
| Pin-to-Pin Delay (tPD) | 30 ns | — |
| Maximum Internal Frequency (fMAX) | 100 MHz (pipelined) | — |
| AND Array | 24V16 | — |
| Process Technology | CMOS, UV-erasable EPROM cells | — |
| Supply Voltage (VCC) | 5 V (TTL-compatible I/O) | — |
| Packhaging | 24-pin Ceramic DIP (windowed, CDIP) | 24-pin CERDIP (windowed) |
| Temperature na Operasyon | -55C to +125C (military/extended) | Commercial (0C to +70C) |
| Output Polarity | User-configurable per macrocell | — |
| Flip-Flop per Cell | D / T / J-K configurable | — |
| Programming Method | UV erase + Classic-series PLD programmer | — |
| Tindminan RoHS | unknown | — |
| Manufacturer | Rochester Electronics (originally Altera) | — |
| Logic Expanders | — | 4 (4 product terms per macrocell) |
| Usable Gates | — | 300 |
| Maximum Pipelined Clock Frequency | — | 100 MHz |
| Propagation Delay (tPD) | — | 30 ns |
| Dedicated Inputs | — | 16 |
| I/O Pins | — | 16 (with output enable) |
| Uri ng Pagpapasok | — | Through-Hole |
| Speed Grade | — | -30 (30 ns tPD) |
| Technology | — | CMOS EPROM |
| Programmability | — | UV-erasable, windowed EPROM |
| Security Bit | — | Yes (protects design after programming) |
| Output Modes | — | Registered and Combinatorial |