EP610LI-30 vs EP610DC-30 比較

詳細並排比較 EP610LI-30 由 Rochester Electronics 與 EP610DC-30 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Rochester Electronics
EP610LI-30 EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester

EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester

EP610LI-30 ✓ 啟用中

規格比較

參數 EP610LI-30 EP610DC-30
品牌 Rochester Electronics Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 NRND
Product Type EPLD (Erasable Programmable Logic Device) Classic EPLD (Erasable Programmable Logic Device)
Family Classic EPLD (MAX architecture) EP610 (Classic Device Family)
Macrocells 16 16
Pin-to-Pin Delay (tPD) 30 ns —
Maximum Internal Frequency (fMAX) 100 MHz (pipelined) —
AND Array 24V16 —
Process Technology CMOS, UV-erasable EPROM cells —
Supply Voltage (VCC) 5 V (TTL-compatible I/O) —
封裝 24-pin Ceramic DIP (windowed, CDIP) 24-pin CERDIP (windowed)
工作溫度 -55C to +125C (military/extended) Commercial (0C to +70C)
Output Polarity User-configurable per macrocell —
Flip-Flop per Cell D / T / J-K configurable —
Programming Method UV erase + Classic-series PLD programmer —
RoHS 狀態 unknown —
Manufacturer Rochester Electronics (originally Altera) —
Logic Expanders — 4 (4 product terms per macrocell)
Usable Gates — 300
Maximum Pipelined Clock Frequency — 100 MHz
Propagation Delay (tPD) — 30 ns
Dedicated Inputs — 16
I/O Pins — 16 (with output enable)
安裝類型 — Through-Hole
Speed Grade — -30 (30 ns tPD)
Technology — CMOS EPROM
Programmability — UV-erasable, windowed EPROM
Security Bit — Yes (protects design after programming)
Output Modes — Registered and Combinatorial

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