EP610PI-25 vs EP610PC-25T Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610PI-25 sa pamamagitan ng Rochester Electronics at EP610PC-25T sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester
EP610PI-25 ObsoleteIntel
EP610PC-25T - 16-Macrocell Classic EPLD, 25ns, PDIP-24 | Intel / Altera
EP610PC-25T ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP610PI-25 | EP610PC-25T |
|---|---|---|
| Brand | Rochester Electronics | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Product Type | Erasable Programmable Logic Device (EPLD) | — |
| Series | Classic EP610 | — |
| Macrocells | 16 | — |
| Usable Gates | ~300 gates | — |
| Propagation Delay (tPD) | 25 ns | 25 ns (speed grade 25) |
| Maximum Internal Frequency (fCNT) | [DATA_NEEDED: fCNT] | — |
| Number of Dedicated Inputs | 4 | — |
| Number of Bidirectional I/O Pins | 16 | — |
| Packhaging | 24-pin DIP (PI) ceramic through-hole | PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing) |
| Hanay ng Temperature na Operasyon | Industrial (I suffix): -40C to +85C | — |
| Supply Voltage (VCC) | 5 V nominal | 5 V |
| Process Technology | CMOS, UV-erasable | ECMOS (CMOS, EPROM-based) |
| Programmable Flip-Flop Modes | D, T, JK, SR (per macrocell) | — |
| Global Clock Pins | 1 | — |
| Uri ng Pagpapasok | Through-Hole (DIP) | Through-hole |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS] | — |
| Original Manufacturer | Altera (now Intel PSG; legacy stock from Rochester Electronics) | — |
| Manufacturer | — | Intel (formerly Altera) |
| Distributor / Stocking Source | — | Rochester Electronics, LLC |
| Device Family | — | Altera Classic EPLD - EP610 |
| Device Type | — | Erasable Programmable Logic Device (EPLD, OTP for plastic package) |
| Logic Capacity | — | 300 usable gates |
| Macro Cells | — | 16 |
| Registers | — | 16 |
| User I/Os | — | 16 |
| Maximum Toggle Frequency | — | [DATA_NEEDED: max fmax] |
| Pipelined Data Rate | — | up to 100 MHz |
| Pinout Compatibility | — | Pin-compatible with EP610DC-25 (CERDIP-24, windowed) |
| Temperature na Operasyon | — | 0 °C to +70 °C (commercial) |
| Programming Method | — | OTP (one-time programmable) via Altera programming hardware |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Shipping Form (T suffix) | — | Tube |