EP610PI-25 vs EP610PC-25T 比較

詳細並排比較 EP610PI-25 由 Rochester Electronics 與 EP610PC-25T 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Rochester Electronics
EP610PI-25 EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester

EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester

EP610PI-25 Obsolete

規格比較

參數 EP610PI-25 EP610PC-25T
品牌 Rochester Electronics Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Product Type Erasable Programmable Logic Device (EPLD) —
Series Classic EP610 —
Macrocells 16 —
Usable Gates ~300 gates —
Propagation Delay (tPD) 25 ns 25 ns (speed grade 25)
Maximum Internal Frequency (fCNT) [DATA_NEEDED: fCNT] —
Number of Dedicated Inputs 4 —
Number of Bidirectional I/O Pins 16 —
封裝 24-pin DIP (PI) ceramic through-hole PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing)
工作溫度範圍 Industrial (I suffix): -40C to +85C —
Supply Voltage (VCC) 5 V nominal 5 V
Process Technology CMOS, UV-erasable ECMOS (CMOS, EPROM-based)
Programmable Flip-Flop Modes D, T, JK, SR (per macrocell) —
Global Clock Pins 1 —
安裝類型 Through-Hole (DIP) Through-hole
Lead-Free / RoHS [DATA_NEEDED: RoHS] —
Original Manufacturer Altera (now Intel PSG; legacy stock from Rochester Electronics) —
Manufacturer — Intel (formerly Altera)
Distributor / Stocking Source — Rochester Electronics, LLC
Device Family — Altera Classic EPLD - EP610
Device Type — Erasable Programmable Logic Device (EPLD, OTP for plastic package)
Logic Capacity — 300 usable gates
Macro Cells — 16
Registers — 16
User I/Os — 16
Maximum Toggle Frequency — [DATA_NEEDED: max fmax]
Pipelined Data Rate — up to 100 MHz
Pinout Compatibility — Pin-compatible with EP610DC-25 (CERDIP-24, windowed)
工作溫度 — 0 °C to +70 °C (commercial)
Programming Method — OTP (one-time programmable) via Altera programming hardware
RoHS 狀態 — [DATA_NEEDED: RoHS status]
Shipping Form (T suffix) — Tube

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