EP910DM883B vs EP910DI-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910DM883B sa pamamagitan ng Altera at EP910DI-35 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910DM883B | EP910DI-35 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Manufacturer | Altera (now part of Intel) | Original Altera; long-term authorized by Rochester Electronics, LLC |
| Family | Classic EPLD - EP910 Series | Altera Classic EPLD |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Architecture | PAL-type AND-OR-NOT, CMOS | — |
| Macrocells | 24 | 24 |
| Inputs | 36 | — |
| Outputs | 24 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 40 ns (typical) | 35 ns |
| Maksimum na Taktiko ng Oras | 25 MHz | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| Programming Voltage (VPP) | 12.5 V (UV-erase window) | — |
| Temperature na Operasyon | -55 °C to +125 °C (military) | -40C to +85C (industrial) |
| Packhaging | CDIP-40 (Ceramic DIP, 40-pin) | CDIP-40 (Ceramic DIP with UV window) |
| Uri ng Pagpapasok | Through-Hole (DIP) | Through-Hole |
| MIL Processing | MIL-STD-883B Class B | — |
| Configuration Memory | UV-erasable EPROM | — |
| Logic Elements | Combinational + Registered | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Maximum Toggle Frequency (fCNT) | — | 28.6 MHz |
| Supply Current (ICC) | — | 40 mA typical |
| Dedicated Inputs | — | 10 |
| Bidirectional I/O Pins | — | 20 |
| Total Pins | — | 40 |
| Technology | — | CMOS, UV-erasable EPROM |
| Programming Method | — | EPROM programmer + JEDEC fuse map |
| Erasure Method | — | UV light through quartz window |
| Logic Family | — | PAL-type AND/OR array with D flip-flops |