EP910ILC-12 vs EP910DC-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILC-12 sa pamamagitan ng Intel at EP910DC-35 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910ILC-12 | EP910DC-35 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera EP910 Classic EPLD | Classic EPLD EP910 |
| Number of Macrocells | 24 | — |
| Usable Gates | 450 (typical) | 900 gates |
| Propagation Delay (tPD) | 12 ns (max) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Nominal Supply | 5 V | — |
| Memory Technology | UV-erasable CMOS EPROM | — |
| Packhaging | 28-PLCC (J-Lead, 11.5 x 11.5 mm) | 40-pin CDIP (Ceramic DIP) with quartz window |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | -40 °C to +85 °C (industrial grade, 'I' suffix) | 0 °C to +70 °C (commercial) |
| Configuration Storage | Non-volatile EPROM (instant-on) | — |
| Programming Method | Altera programming algorithm (serial/parallel master-slave) | JEDEC fuse map via device programmer; UV erase |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic DIP with Pb-bearing lead finish) |
| Bilang ng Pins | 28 | — |
| Feedback Paths | 16 dedicated | — |
| Device Type | — | UV-Erasable CMOS PLD (PAL-type) |
| Architecture | — | PAL-type sum-of-products AND-OR array |
| Macrocells | — | 24 |
| Product Terms | — | 240 |
| Dedicated Inputs | — | 12 |
| I/O Pins | — | 24 |
| Total Inputs | — | 36 |
| Propagation Delay (tpd) | — | 35 ns |
| Maksimum na Taktiko ng Oras | — | 37 MHz (typical, internal) |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V (5 V nominal) |
| Lead Pitch | — | 2.540 mm |
| Termination Style | — | Through-Hole |
| Technology | — | CMOS, UV-erasable EPROM cell |
| Lifecycle | — | Obsolete / last-time-buy from authorized distributors |