EP910ILC-12 vs EP910ILC-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILC-12 sa pamamagitan ng Intel at EP910ILC-25 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910ILC-12 | EP910ILC-25 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera EP910 Classic EPLD | EP910 Classic EPLD |
| Number of Macrocells | 24 | — |
| Usable Gates | 450 (typical) | — |
| Propagation Delay (tPD) | 12 ns (max) | 25 ns |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Nominal Supply | 5 V | — |
| Memory Technology | UV-erasable CMOS EPROM | — |
| Packhaging | 28-PLCC (J-Lead, 11.5 x 11.5 mm) | 44-pin JLCC (windowed ceramic) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40 °C to +85 °C (industrial grade, 'I' suffix) | -40C to +85C (industrial) |
| Configuration Storage | Non-volatile EPROM (instant-on) | — |
| Programming Method | Altera programming algorithm (serial/parallel master-slave) | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | non_compliant (ceramic windowed package) |
| Bilang ng Pins | 28 | — |
| Feedback Paths | 16 dedicated | — |
| Macrocells | — | 24 |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Technology | — | CMOS EPROM (UV-erasable) |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Volte ng Pagbibigay | — | 5 V |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Katayuan ng Lifecycle | — | Obsolete - last time buy was late 1990s |