EP910ILC-15 vs EP910IPC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILC-15 sa pamamagitan ng Intel at EP910IPC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910ILC-15 | EP910IPC-15 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Classic EPLD | — |
| Series | EP910 | — |
| Logic Gates | 450 | — |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Maximum Operating Frequency | 83.33 MHz | — |
| Volte ng Pagbibigay | 5 V | — |
| Uri ng Memory | EPROM (UV-erasable) | — |
| Temperature na Operasyon | -40C to +85C (industrial) | 0C to +70C (commercial, IPC suffix) |
| Packhaging | 44-pin PLCC (J-lead) | PDIP-40 (Plastic DIP, 40-pin) |
| Uri ng Pagpapasok | Surface Mount (SMT) | Through-Hole |
| Propagation Class | -15 speed grade | — |
| Storage Condition | Dry cabinet, humidity-controlled | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs status not confirmed in verified data] |
| Device Family | — | Altera Classic EPLD (EP910 series) |
| Product Type | — | Erasable Programmable Logic Device (EPLD) |
| Architecture | — | PAL-type, CMOS |
| Dedicated Inputs | — | 12 |
| I/O Pins | — | 24 |
| Product Terms | — | 240 |
| External Clocks | — | 2 |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Process Technology | — | CMOS |
| Programming Method | — | JEDEC fuse map via Altera EPLD programmer |
| Bilang ng Pin | — | 40 |