EP910ILC-25 vs EP910ILI-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILC-25 sa pamamagitan ng Intel at EP910ILI-25 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910ILC-25 | EP910ILI-25 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | EP910 Classic EPLD | — |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | — |
| Logic Blocks | Sum-of-products AND/OR array | — |
| Technology | CMOS EPROM (UV-erasable) | CMOS, EPROM |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | — |
| Packhaging | 44-pin JLCC (windowed ceramic) | PLCC-44 (windowed ceramic, J-lead) |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| Volte ng Pagbibigay | 5 V | — |
| Development Tool | Altera MAX+PLUS II (legacy) | — |
| Tindminan RoHS | non_compliant (ceramic windowed package) | Non-compliant (windowed ceramic package) |
| Katayuan ng Lifecycle | Obsolete - last time buy was late 1990s | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Series | — | EP910 (Classic EPLD) |
| Dedicated Inputs | — | 12 |
| I/O Pins | — | 24 |
| Product Terms | — | 240 (maximum) |
| Architecture | — | PAL-type with global interconnect bus |
| Operating Voltage | — | 5 V (4.75 V to 5.25 V) |
| Programming Method | — | UV-erasable (windowed), MAX+PLUS II programmer |
| Logic Test Circuitry | — | On-board JTAG-compatible test |