EP910LC44-40 vs EP910LI44-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC44-40 sa pamamagitan ng Altera at EP910LI44-35 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LC44-40 | EP910LI44-35 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Altera Classic EPLD | — |
| Macrocells | 24 | — |
| Product Terms (Total) | 240 | — |
| I/O Pins | 24 (bidirectional) | — |
| Dedicated Inputs | 12 | — |
| Total Inputs | 36 | — |
| Global Clock Inputs | 2 | — |
| Propagation Delay (tPD) | 40 ns | 35 ns |
| Supply Voltage (VCC) | 5 V (nominal) | — |
| Technology | CMOS, UV-erasable EPROM | — |
| Logic Compatibility | TTL-compatible I/O | — |
| Packhaging | 44-pin PLCC (Plastic Leaded Chip Carrier) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | [DATA_NEEDED: temperature grade] |
| Programming Method | JEDEC file via LP6/MP9 or compatible programmer | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount / Through-Hole Socket |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | unknown |
| Device Family | — | Altera Classic EPLD |
| Series | — | EP910 |
| Architecture | — | PAL-type macrocell (EPLD) |
| Number of Macrocells | — | 24 |
| Number of External Clocks | — | 2 |
| Maksimum na Taktiko ng Oras | — | 37 MHz |
| Process Technology | — | CMOS |
| Volte ng Pagbibigay | — | [DATA_NEEDED: VCC range] |
| Bilang ng Pins | — | 44 |
| Package Type | — | PLCC-44 (J-lead) |
| Programmability | — | UV-erasable / one-time programmable |
| Logic Family | — | Classic EPLD |