EP910LC44-40 vs EP910LI44-35 比較
詳細並排比較 EP910LC44-40 由 Altera 與 EP910LI44-35 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LC44-40 | EP910LI44-35 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | Altera Classic EPLD | — |
| Macrocells | 24 | — |
| Product Terms (Total) | 240 | — |
| I/O Pins | 24 (bidirectional) | — |
| Dedicated Inputs | 12 | — |
| Total Inputs | 36 | — |
| Global Clock Inputs | 2 | — |
| Propagation Delay (tPD) | 40 ns | 35 ns |
| Supply Voltage (VCC) | 5 V (nominal) | — |
| Technology | CMOS, UV-erasable EPROM | — |
| Logic Compatibility | TTL-compatible I/O | — |
| 封裝 | 44-pin PLCC (Plastic Leaded Chip Carrier) | — |
| 工作溫度 | 0C to +70C (commercial) | [DATA_NEEDED: temperature grade] |
| Programming Method | JEDEC file via LP6/MP9 or compatible programmer | — |
| 安裝類型 | Surface Mount | Surface Mount / Through-Hole Socket |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | unknown |
| Device Family | — | Altera Classic EPLD |
| Series | — | EP910 |
| Architecture | — | PAL-type macrocell (EPLD) |
| Number of Macrocells | — | 24 |
| Number of External Clocks | — | 2 |
| 最大時脈頻率 | — | 37 MHz |
| Process Technology | — | CMOS |
| 供應電壓 | — | [DATA_NEEDED: VCC range] |
| 腳位數 | — | 44 |
| Package Type | — | PLCC-44 (J-lead) |
| Programmability | — | UV-erasable / one-time programmable |
| Logic Family | — | Classic EPLD |