EP910LI-35Y vs EP910LI-40 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LI-35Y sa pamamagitan ng Intel at EP910LI-40 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LI-35Y | EP910LI-40 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Altera Classic EPLD | — |
| Usable Gates | 450 | — |
| Macrocells | 24 | 24 |
| Propagation Delay (tpd) | 35 ns | — |
| Maximum Frequency (fmax) | [DATA_NEEDED: maximum toggle frequency in MHz] | — |
| Supply Voltage (VCC) | 5 V | — |
| Process Option | L (low-power CMOS) | — |
| Temperature Grade | Industrial (-40 °C to +85 °C) | — |
| Packhaging | PLCC-44 (J-lead) | PLCC-44 (J-lead, windowed ceramic) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (socket-compatible) |
| Lead Finish | Lead-free (Y suffix, RoHS-compliant) | — |
| I/O Pins | 24 | 24 bidirectional |
| Dedicated Inputs | 36 | 12 |
| Technology | CMOS EPROM/UV-erasable | Low-power CMOS (L-suffix) |
| Tindminan RoHS | Compliant (Y suffix) | Non-compliant (windowed ceramic PLCC, legacy) |
| Manufacturer | — | Altera (now Intel PSG) |
| Product Family | — | Classic EPLD - EP910 series |
| Device Type | — | Erasable Programmable Logic Device (EPLD) |
| Maximum Logic Inputs | — | 36 |
| Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 40 ns |
| Temperature na Operasyon | — | -40C to +85C (industrial, I-suffix) |
| Programmability | — | UV-erasable, JEDEC-standard algorithm |
| Lifecycle | — | Obsolete - replaced by MAX 7000 / MAX II CPLD family |