EP910LI-40 vs EP910LI-40T Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LI-40 sa pamamagitan ng Altera at EP910LI-40T sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LI-40 | EP910LI-40T |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Manufacturer | Altera (now Intel PSG) | — |
| Product Family | Classic EPLD - EP910 series | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 12 |
| I/O Pins | 24 bidirectional | 24 |
| Maximum Logic Inputs | 36 | — |
| Product Terms | 240 | 240 |
| Propagation Delay (tPD) | 40 ns | 40 ns |
| Technology | Low-power CMOS (L-suffix) | CMOS, UV-erasable EPROM |
| Temperature na Operasyon | -40C to +85C (industrial, I-suffix) | -40C to +85C (Industrial) |
| Packhaging | PLCC-44 (J-lead, windowed ceramic) | Tape and Reel (suffix T); 40-pin DIP / 44-pin PLCC |
| Uri ng Pagpapasok | Surface Mount (socket-compatible) | — |
| Programmability | UV-erasable, JEDEC-standard algorithm | — |
| Tindminan RoHS | Non-compliant (windowed ceramic PLCC, legacy) | [DATA_NEEDED: rohs status] |
| Lifecycle | Obsolete - replaced by MAX 7000 / MAX II CPLD family | — |
| Family | — | Classic EPLD |
| Maximum Inputs | — | 36 |
| Maximum Outputs | — | 24 |
| Volte ng Pagbibigay | — | 5 V (typical) |
| Architecture | — | PAL-type with global bus |
| Programming Method | — | Altera Master Programming Unit (MPU), no JTAG |