EPC1441LC20N vs EPC1441LI20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC1441LC20N sa pamamagitan ng Intel at EPC1441LI20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC1441LC20N | EPC1441LI20 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Uri ng Memory | OTP EPROM (One-Time Programmable) | OTP Configuration PROM (PROM) |
| Laki ng Memory | 440 Kbit | — |
| Organisasyon | 55 K x 8 bit | — |
| Interface | Serial, 4-wire (nCS, DCLK, DATA, nINIT_CONF) | — |
| Configuration Clock (DCLK) | 8 MHz maximum | — |
| Programming Interface | JTAG (IEEE 1149.1) / Altera Programming Unit | — |
| Volte ng Pagbibigay | 3.3 V (typical) | 3.3 V |
| Packhaging | 20-PLCC (J-Lead, 9 x 9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Temperature na Operasyon | 0 C to +70 C (commercial) | -40 C to +85 C (industrial) |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury |
| Cascadable | Yes (nCS daisy-chain) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Uri ng Pagpapasok | Surface Mount (PLCC socket compatible) | — |
| Density | — | 441 kbits (440,800 bits) |
| Number of Words | — | 440,800 |
| Bits per Word | — | 1 bit |
| Configuration Interface | — | Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) |
| Pin Pitch | — | 1.27 mm |
| Programming Method | — | One-Time-Programmable via Altera programming hardware |
| Configuration Time | — | Depends on FPGA bitstream length and DCLK frequency |