EPC1441PCB vs EPC1213PC8 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC1441PCB sa pamamagitan ng Altera at EPC1213PC8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC1441PCB EPC1213PC8
Brand Altera Altera
Kategorya FPGA & CPLD Memory ICs
Katayuan ng Lifecycle Obsolete Obsolete
Device Type Enhanced Configuration Device for SRAM FPGAs —
Memory Density 4,435,200 bits (~4 Mb) —
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, FLEX 10K, FLEX 6000, FLEX 8000, Mercury —
Programmability In-system programmable via JTAG (IEEE 1149.1) One-Time Programmable (OTP)
Configuration Interface Altera serial/parallel configuration bus (nSTATUS, nCONFIG, DCLK, DATA) —
Supply Voltage (VCC) 3.3 V nominal —
I/O Voltage Tolerance 5 V tolerant —
Packhaging PLCC-20 (Plastic Leaded Chip Carrier) 8-Pin PDIP (R-PDIP-T8)
Uri ng Pagpapasok Surface Mount / Socket Through-Hole
Temperature na Operasyon 0 C to +70 C (commercial) 0 °C to +70 °C (Commercial)
Configuration Mode Automatic at power-up —
Architecture Flash memory + on-chip configuration controller —
JTAG Support Yes (IEEE 1149.1 boundary scan) —
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] Compliant (post-lead-free Altera revision)
Lead-Free [DATA_NEEDED: lead-free status] Yes
Uri ng Memory — OTP Configuration PROM (EEPROM cell)
Laki ng Memory — 212 Kbit
Interface — Serial (4-wire: nCS, DCLK, DATA, OE)
Configuration Mode Supported — FLEX/APEX FPP / PS serial
Maksimum na Taktiko ng Oras — 6 MHz
Volte ng Pagbibigay — 3.0 V to 3.6 V
Programming Standard — IEEE Std 1532 / Jam STAPL
Standby Current — < 50 µA typical
Bilang ng Pin — 8
JEDEC Package Code — R-PDIP-T8

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