EPC2L1696-10F vs EPC2L120 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2L1696-10F sa pamamagitan ng Altera at EPC2L120 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC2L1696-10F | EPC2L120 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | NRND | NRND |
| Device Type | Configuration EPROM for SRAM-based LUT FPGAs | — |
| Supported Logic Density | 1696 LUTs | — |
| Configuration Interface | 5-pin Altera serial (nCS, DCLK, DATA, OE, nINIT_CONF) | Serial, FPGA-targeted |
| Memory Technology | CMOS EEPROM | — |
| Supply Voltage (VCC) | 3.3 V | — |
| Access Time | 10 ns (speed grade -10) | — |
| Maximum DCLK Frequency | [DATA_NEEDED: DCLK max frequency] | — |
| Program / Erase Cycles | >= 100,000 cycles | — |
| Data Retention | [DATA_NEEDED: data retention years] | 20 years (per Altera datasheet family) |
| In-System Programming | Yes (4-wire JTAG-style interface) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | -40 C to +85 C |
| Packhaging | 20-pin PLCC | PLCC-20 |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Uri ng Memory | — | Configuration PROM (Flash-based) |
| Density | — | 120 Kbit |
| Operating Voltage | — | 2.7 V to 3.6 V (3.3 V typ) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Compatible FPGAs | — | Altera Cyclone, Cyclone II, APEX-series |
| CONF_DONE Output | — | Open-drain, wire-OR capable |
| Program/Erase Cycles | — | 100 cycles minimum |
| Lead-Free | — | unknown |
| Family | — | EPC2 (Enhanced Configuration) |