EPC2L20N vs EPC2L20U-HAF480119C Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2L20N sa pamamagitan ng Altera at EPC2L20U-HAF480119C sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPC2L20U-HAF480119C - FPGA Config Device, SRAM LUT | Intel
EPC2L20U-HAF480119C ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPC2L20N | EPC2L20U-HAF480119C |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Fungsi | In-System Programmable Configuration PROM for SRAM-based LUT FPGAs | — |
| Laki ng Memory | 1.6 Mbit | 1.6 Mb |
| Programmable Type | In System Programmable (ISP) | — |
| Supply Voltage - VCCINT/VCCIO | 3.0 V to 3.6 V or 4.5 V to 5.5 V | — |
| Packhaging / Kaso | 20-LCC (J-Lead), PLCC-20 | — |
| Packaging | Tube | — |
| Temperature na Operasyon | 0C to +70C (commercial) | — |
| Supported FPGA Families | Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet) | — |
| Configuration Interface | Serial (Altera FPP / PS configuration scheme) | — |
| Cascade Support | Yes (multi-PROM chain via CE control) | Yes (multi-PROM chains for larger FPGAs) |
| Programming Method | In-system via 4-wire ISP / JTAG-style | — |
| Uri ng Pagpapasok | Surface Mount (J-Lead PLCC) | Surface Mount / Socketed |
| Bilang ng Pin | 20 | — |
| Lead Finish | Matte Tin (Pb-free) | — |
| Level ng MSL | 3 (168 hours) | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Uri ng Memory | — | Configuration PROM (non-volatile) |
| Target Device | — | SRAM-based LUT FPGAs (Cyclone, Stratix, APEX families) |
| Core Supply Voltage | — | 3.3 V |
| I/O Tolerance | — | 5 V tolerant |
| Configuration Modes | — | Serial (1-bit), Parallel (8-bit FPP), JTAG |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| Programmability | — | In-system programmable via JTAG |
| Configuration Clock Range | — | 10 MHz to 40 MHz |
| Bitstream Compression Support | — | Yes (Cyclone/Stratix compressed bitstreams) |
| Packhaging | — | PLCC-20 |
| Hanay ng Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |