EPC2L20U-HAF480119C vs EPC2L120 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2L20U-HAF480119C sa pamamagitan ng Intel at EPC2L120 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPC2L20U-HAF480119C - FPGA Config Device, SRAM LUT | Intel
EPC2L20U-HAF480119C ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPC2L20U-HAF480119C | EPC2L120 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Uri ng Memory | Configuration PROM (non-volatile) | Configuration PROM (Flash-based) |
| Laki ng Memory | 1.6 Mb | — |
| Target Device | SRAM-based LUT FPGAs (Cyclone, Stratix, APEX families) | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Tolerance | 5 V tolerant | — |
| Configuration Modes | Serial (1-bit), Parallel (8-bit FPP), JTAG | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Programmability | In-system programmable via JTAG | — |
| Cascade Support | Yes (multi-PROM chains for larger FPGAs) | — |
| Configuration Clock Range | 10 MHz to 40 MHz | — |
| Bitstream Compression Support | Yes (Cyclone/Stratix compressed bitstreams) | — |
| Packhaging | PLCC-20 | PLCC-20 |
| Uri ng Pagpapasok | Surface Mount / Socketed | Surface Mount |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | unknown |
| Density | — | 120 Kbit |
| Configuration Interface | — | Serial, FPGA-targeted |
| Operating Voltage | — | 2.7 V to 3.6 V (3.3 V typ) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Compatible FPGAs | — | Altera Cyclone, Cyclone II, APEX-series |
| Temperature na Operasyon | — | -40 C to +85 C |
| CONF_DONE Output | — | Open-drain, wire-OR capable |
| Data Retention | — | 20 years (per Altera datasheet family) |
| Program/Erase Cycles | — | 100 cycles minimum |
| Family | — | EPC2 (Enhanced Configuration) |