EPF10K200SFC484-3 vs EPF10K200SFC484-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K200SFC484-3 sa pamamagitan ng Intel at EPF10K200SFC484-2X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPF10K200SFC484-3 - 200K Gate FLEX-10KS FPGA 484-BGA | Intel / Altera
EPF10K200SFC484-3 ObsoletePagsanggunian na paghahambing
| Parametro | EPF10K200SFC484-3 | EPF10K200SFC484-2X |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Series | FLEX-10KS | FLEX 10KS |
| Family | FLEX 10K | FLEX 10K |
| System Gates | 200,000 | — |
| Logic Cells | 9,984 | — |
| Logic Array Blocks (LABs) | 1,248 | — |
| User I/O Pins | 369 | — |
| Core Voltage | 2.375 V to 2.625 V | — |
| Process Technology | 0.22 µm CMOS SRAM | [DATA_NEEDED: process node nm] |
| Maximum Internal Frequency | 166.67 MHz | — |
| Embedded Memory (RAM bits) | 40,960 (via EABs) | — |
| Global Clock Networks | 4 | — |
| Packhaging | 484-Ball FineLine BGA (PBGA484) | — |
| Package Dimensions | 23 mm × 23 mm, 1.0 mm pitch | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 °C to +70 °C (Commercial) | 0C to +70C (commercial) |
| Configuration Method | SRAM, JTAG, EPC2 PROM | — |
| I/O Standards | 3.3 V LVTTL/LVCMOS, 5.0 V PCI | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Status | Obsolete (last shipped 2007-2010, available via brokers) | — |
| Number of Logic Elements / Cells | — | 9984 |
| Number of LABs / CLBs | — | 1248 |
| Total RAM Bits | — | 98304 |
| Number of Gates | — | 200000 (typical) |
| Number of I/O | — | 369 |
| Core Voltage - Supply | — | 2.375 V to 2.625 V |
| Operating Frequency (max) | — | 250 MHz (family-typical, -2 speed grade) |
| Packhaging / Kaso | — | 484-BBGA (FineLine BGA) |
| Supplier Device Package | — | 484-FBGA (23 x 23 mm, 1.0 mm pitch) |
| Technology | — | CMOS, SRAM-based configuration |
| Configuration Memory | — | External serial (EPC1/EPC2 family compatible) |
| JTAG Support | — | IEEE 1149.1-1990 boundary-scan |