EPF10K250EBI600-3 vs EPF10K250EBC600-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K250EBI600-3 sa pamamagitan ng Intel at EPF10K250EBC600-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPF10K250EBI600-3 - 250K Gates FLEX 10KE FPGA, 600-BGA | Intel
EPF10K250EBI600-3 ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EPF10K250EBI600-3 | EPF10K250EBC600-3 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements | 12,160 | 12,160 LEs |
| Typical Gate Count | 250,000 system gates | — |
| Embedded System Blocks (ESBs) | 12 | — |
| Maximum User I/O | 470 | 470 |
| Dedicated Inputs | 4 | — |
| PLLs | 4 | — |
| On-chip RAM | Up to 40 Kbits | — |
| Packhaging | 600-ball BGA (HBGA) | 600-ball FineLine BGA |
| Ball Pitch | 1.93 mm | — |
| Core Voltage | 2.3 V (FLEX 10KE standard) [DATA_NEEDED: confirm exact VCCINT] | — |
| Temperature na Operasyon | Industrial, 0C to +85C [DATA_NEEDED: confirm -40C to +85C range] | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -3 (fastest) | -3 |
| Process Technology | 0.22 µm CMOS, 4-layer metal | SRAM-based CMOS |
| Configuration Method | SRAM, requires external configuration device (EPC series) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | Not specified (SnPb / tin-lead finish per legacy distributor listing) | — |
| Lead-free | no (legacy tin-lead per distributor description) | — |
| Typical Gates | — | 250,000 |
| Embedded Array Blocks (EABs) | — | 12 (each 2 Kbits) |
| Total Embedded Memory | — | 24 Kbits (RAM) |
| PLLs (Phase-Locked Loops) | — | 4 |
| Dedicated Clock Inputs | — | 6 |
| Core Supply Voltage | — | 3.3 V |
| I/O Supply Voltage | — | 3.3 V (5 V tolerant) |
| Configuration Mode | — | Passive Serial / Passive Parallel / JTAG |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |