EPF6010ANTC100-2 vs EPF6010ATC100-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF6010ANTC100-2 sa pamamagitan ng Intel at EPF6010ATC100-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPF6010ANTC100-2 - FLEX 6000 FPGA, 880 LEs, 71 I/O, 100-TQFP | Intel
EPF6010ANTC100-2 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPF6010ANTC100-2 | EPF6010ATC100-3 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | FLEX 6000 / FLEX 6000A | FLEX 6000 |
| Logic Elements | 880 | — |
| Programmable I/O Pins | 71 | — |
| Packhaging | 100-pin TQFP (14x14 mm, 0.5 mm pitch) | TQFP-100 (100-pin) |
| Speed Grade | -2 | -3 (commercial, slowest grade) |
| Temperature na Operasyon | Commercial (0C to +70C) | 0C to +70C (commercial) |
| Configuration Method | SRAM (volatile), in-system programmable | — |
| Programming Interface | IEEE 1149.1 (JTAG) / passive serial / EPC configuration device | — |
| Supply Voltage (VCCINT) | 5.0 V (FLEX 6000A); 3.3 V (FLEX 6000) | 3.3 V |
| I/O Standards Supported | TTL, CMOS, PCI (with clamping diodes) | — |
| Number of LABs | [DATA_NEEDED: LAB count] | — |
| Embedded Memory | [DATA_NEEDED: embedded RAM blocks] | — |
| Global Clock Networks | [DATA_NEEDED: global clock count] | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (168 hours) | [DATA_NEEDED: MSL level] |
| Packaging | Tray (per Altera packing standard) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 880 |
| Usable Gates | — | 10,000 |
| Logic Array Blocks (LABs) | — | 88 |
| User I/O Pins | — | 71 |
| Process Technology | — | 0.42 µm CMOS SRAM |
| I/O Voltage Tolerance | — | 3.3 V / 5 V tolerant |
| Configuration Memory | — | SRAM (external configuration device required) |
| JTAG Support | — | Yes (IEEE 1149.1) |