EPM1270T144C5N vs EPM3128ATC144-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM1270T144C5N sa pamamagitan ng Altera at EPM3128ATC144-7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM1270T144C5N - MAX II CPLD, 980 LEs, 212 I/O, TQFP-144 | Intel/Altera
EPM1270T144C5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM1270T144C5N | EPM3128ATC144-7 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | MAX II | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 980 | — |
| Logic Elements (LEs) | 1270 | — |
| Maximum User I/Os | 212 | — |
| Number of Logic Array Blocks (LABs) | 127 | — |
| Process Technology | 0.18 µm | CMOS EEPROM |
| Propagation Delay (tPD) | 6.2 ns | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| Supply Voltage (Core) | 2.5 V / 3.3 V | — |
| Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Packhaging | TQFP-144 (T144), 22 x 22 mm, 0.5 mm pitch | TQFP-144 (22x22 mm) |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | 0C to +70C (Commercial) |
| Speed Grade | -5 | -7 |
| Programming Interface | JTAG (IEEE 1149.1), In-System Programmable | — |
| Configuration Memory | Internal flash (non-volatile, instant-on) | — |
| Tindminan RoHS | Compliant (lead-free) | — |
| Wala sa Halogen | Compliant | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Macrocells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells each) |
| User I/Os | — | 96 |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Pin-to-Pin Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fCNT) | — | 129.9 MHz |
| Programming Technology | — | CMOS EEPROM (in-system programmable) |
| JTAG Support | — | IEEE 1149.1 boundary-scan + ISP |