EPM2210F256C4N vs EPM2210F256C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM2210F256C4N sa pamamagitan ng Intel at EPM2210F256C4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM2210F256C4N | EPM2210F256C4 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | — |
| Device Type | CPLD | — |
| Logic Elements (LE) | 2210 | — |
| Macro Cells | 1700 | — |
| User Flash Memory | 204 Kbit | — |
| Maximum Internal Frequency | 247.5 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.0 ns | — |
| Maximum User I/O Pins | 212 (varies with package) | — |
| Global Clock Networks | 4 | — |
| Process Technology | 0.18 µm | 0.18 µm 6-layer-metal flash |
| Core Supply Voltage | 3.0 V to 3.6 V (3.3 V typical) | 1.8 V |
| MultiVolt I/O Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS, PCI 66 MHz | — |
| Hanay ng Temperature na Operasyon | 0 °C to +85 °C (Commercial) | — |
| Packhaging | 256-ball FineLine BGA (FBGA) | 256-ball FineLine BGA (FBGA) |
| Programming Interface | JTAG IEEE Std. 1149.1 + ISP | JTAG (IEEE 1149.1) ISP |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Series | — | MAX II |
| Logic Elements | — | 2,210 |
| Equivalent Macrocells | — | 1,700 |
| User Flash Memory (UFM) | — | 8 Kbits |
| User I/O Pins | — | 212 |
| I/O Supply Voltage (MultiVolt) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Pin-to-pin Delay (tPD1) | — | 7 ns |
| Maximum Frequency (fMAX) | — | 201 MHz |
| Temperature na Operasyon | — | 0 °C to +85 °C (commercial extended) |