EPM3032ALI44-10N vs EPM3032ALC44-10N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3032ALI44-10N sa pamamagitan ng Altera at EPM3032ALC44-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM3032ALI44-10N EPM3032ALC44-10N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Programmable Type In System Programmable (ISP) —
Family MAX 3000A MAX 3000A
Number of Macrocells 32 —
Number of Usable Gates 600 —
Number of I/O 34 —
Logic Elements / Blocks 2 —
Pin-to-Pin Delay (tPD) 10 ns (speed grade -10) —
Counter Frequency 227.3 MHz —
Core Supply Voltage 3.3 V —
I/O Voltage Support (MultiVolt) 5.0 V / 3.3 V / 2.5 V —
Program Memory Type EEPROM (non-volatile) —
Programming Interface IEEE Std. 1149.1 JTAG —
Packhaging 44-LCC (J-Lead), PLCC-44 44-pin PLCC (J-Lead, surface mount)
Operating Temperature Grade Industrial —
Lead Free Status Contains Lead —
Tindminan RoHS Non-Compliant [DATA_NEEDED: compliant or non-compliant]
PCI Compliance PCI SIG Revision 2.2 (speed grades -4/-5/-6/-7/-10) —
Product Type — CPLD (Complex Programmable Logic Device)
Logic Gates — 600 gates
Macrocells — 32
Logic Array Blocks (LABs) — 2
User I/O Pins — 34
Propagation Delay (tPD) — 10 ns
Internal fMAX — 103.1 MHz
Supply Voltage (VCCINT) — 3.3 V
I/O Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O)
Technology — CMOS EEPROM-based
In-System Programmability — Yes, via IEEE 1149.1 JTAG
ISP Standard Compliance — IEEE Std. 1532
Boundary-Scan Test (BST) — Yes, IEEE 1149.1 compliant
Uri ng Pagpapasok — Surface Mount
Temperature na Operasyon — [DATA_NEEDED: industrial/commercial range]

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita