EPM3064ATI44-10N vs EPM3064ATI44-7N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATI44-10N sa pamamagitan ng Altera at EPM3064ATI44-7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM3064ATI44-10N EPM3064ATI44-7N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 64 —
Usable Gates 1250 1,250 gates
User I/Os 34 —
Dedicated Inputs 4 —
Logic Blocks 4 —
Pin-to-Pin Delay 10 ns (-10 speed grade) —
Maximum Frequency (fMAX) 100 MHz 135.1 MHz
Programmable Type In-System Programmable (EEPROM) —
ISP Interface IEEE Std. 1149.1 (JTAG) —
ISP Standard Compliance IEEE Std. 1532 —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 3.3 V or 2.5 V (MultiVolt) —
Temperature na Operasyon -40C to +85C (Industrial, "N" suffix) —
Packhaging 44-pin TQFP 44-pin TQFP (10x10 mm, 0.8 mm pitch)
Process Technology CMOS EEPROM 0.30 µm CMOS EEPROM
Boundary-Scan Test Built-in (JTAG) —
Uri ng Pagpapasok Surface Mount —
Lead-Free Status Contains Lead (per digchip datasheet excerpt) —
Tindminan RoHS Non-Compliant (per digchip datasheet excerpt) Compliant (lead-free, 'N' suffix)
Logic Elements / Macrocells — 64 macrocells
Pin-to-Pin Logic Delay — 7 ns (speed grade -7)
User I/O Count — 34 I/O
Dedicated Input Pins — 4
Supply Voltage (VCCINT) — 3.3 V
I/O Bank Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V / 5 V tolerant (multiVolt)
Program Memory Type — EEPROM (in-system programmable)
Programming Interface — IEEE 1149.1 JTAG
Operating Temperature Grade — Industrial (-40C to +85C)

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