EPM3064ATI44-7 vs EPM3032ATC44-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATI44-7 sa pamamagitan ng Altera at EPM3032ATC44-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3064ATI44-7 | EPM3032ATC44-7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | — |
| Usable Gates | 1,250 | 600 |
| User I/O | 34 | — |
| Logic Array Blocks (LABs) | 4 (16 macrocells each) | — |
| Propagation Delay (tPD) | 7.5 ns | 7.5 ns |
| Maximum Internal Frequency (fMAX) | 135.1 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | 3.3 V |
| Supply Voltage (VCCIO) | 3.0 V to 3.6 V | — |
| Process Technology | 0.30 µm CMOS EEPROM | CMOS EEPROM (non-volatile) |
| Temperature na Operasyon | -40 °C to +85 °C (Industrial, 'I' suffix) | 0 °C to +70 °C (commercial) |
| Packhaging | 44-pin TQFP (TI44) | 44-pin TQFP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| PCI Compliance | Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2 | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Macro Cells | — | 32 |
| Logic Array Blocks | — | 2 |
| Maximum User I/O | — | 34 |
| Internal Counter Frequency (fCNT) | — | 138.9 MHz |
| I/O Standard | — | MultiVolt, 3.3 V / 5 V tolerant |
| Programming Interface | — | JTAG (IEEE 1149.1) ISP |
| Output Options | — | Totem-pole or open-drain per I/O |
| Lead-Free / Pb-Free | — | [DATA_NEEDED: lead-free status] |