EPM3128ATC144-10N vs EPM3128ATC144-5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3128ATC144-10N sa pamamagitan ng Intel at EPM3128ATC144-5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3128ATC144-10N | EPM3128ATC144-5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 (up to 10,000 for full family) | 2500 |
| Logic Array Blocks (LABs) | 8 | — |
| User I/Os | 96 | — |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | — |
| Counter Frequency (fCNT) | 98 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 3.3 V | — |
| MultiVolt I/O Support | 3.3 V / 2.5 V / 1.8 V | — |
| Configuration Memory | EEPROM (in-system programmable, non-volatile) | — |
| Packhaging | 144-pin TQFP | 144-pin TQFP (20x20 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 °C to +70 °C (commercial) | 0C to 70C (Commercial) |
| JTAG (IEEE 1149.1) | Yes (BST + pin-locking) | — |
| ISP (IEEE 1532) | Yes | — |
| Logic Family | — | CMOS |
| Macrocells | — | 128 |
| User I/O | — | 96 |
| Pin-to-Pin Logic Delay | — | 5 ns |
| Counter Frequency | — | up to 227.3 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Levels Supported | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| In-System Programmability | — | Yes (3.3-V via JTAG) |
| JTAG Boundary Scan | — | IEEE Std 1149.1 compliant |
| Tindminan RoHS | — | Compliant (lead-free) |