EPM3512AFC256-20 vs EPM3512AFC256-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512AFC256-20 sa pamamagitan ng Altera at EPM3512AFC256-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3512AFC256-20 - MAX 3000A CPLD, 512 Macrocells, BGA-256 | Altera
EPM3512AFC256-20 ObsoletePagsanggunian na paghahambing
| Parametro | EPM3512AFC256-20 | EPM3512AFC256-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Typical Usable Gates | 10,000 | — |
| Speed Grade | -20 (20 ns tPD) | — |
| Packhaging | 256-ball FBGA (Fine-pitch BGA) | 256-pin FBGA |
| Bilang ng Pin | 256 | 256 |
| Operating Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | — |
| I/O Voltage (VCCIO) | 2.5 V or 3.3 V (5.0 V tolerant inputs) | — |
| I/O Standards | LVTTL, LVCMOS, 2.5 V, 3.3 V, 5.0 V tolerant | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) |
| JTAG Support | Yes (boundary-scan + ISP) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | unknown |
| Level ng MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Configuration Memory | Internal EEPROM | — |
| Logic Array Blocks (LABs) | — | 16 |
| Usable Gates | — | 10,000 |
| Maximum I/O Pins | — | 208 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 87 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5-V tolerant |
| Programmable Technology | — | CMOS EEPROM |
| Hanay ng Temperature na Operasyon | — | [DATA_NEEDED: industrial/commercial operating temperature range] |
| Architecture | — | MAX (Multiple Array matriX) EEPROM-based |